Congratulations. You have crossed the chasm that separates 99% of developers.
You have learned that Hardware is just an accelerated function call. You can move logic from Python to Verilog and back again, choosing the right tool for the job.
| Skill | What you can build now |
|---|---|
| MMIO (Phase 2) | Custom drivers for sensors, motors, and legacy chips. |
| Overlay Creation (Phase 3) | Hardware accelerators for crypto, signal processing, or proprietary logic. |
| IP Integration | Combining Xilinx IPs (Video, DMA, DSP) into complex SoCs. |
| Python Glue | Rapid prototyping of hardware-controlled applications. |
Now that you understand the “Flow”, you can choose your specialization.
Writing Verilog is hard. High Level Synthesis (HLS) allows you to write C/C++ code and compile it into Hardware IP.
The Zynq is a beast at video processing.
Throughout this journey, we used the “Standard” PYNQ SD card image. But what if you need to build your own?
This requires stepping off the “Easy Path” and learning to build Embedded Linux from scratch.
Your learning journey doesn’t end here; it just gets deeper.
The Loopback Project in this repository is the advanced course. It documents the painful, messy, real-world process of building a custom programmable logic IP and the software and OS to support it.
It covers:
If you are ready to enter the factory and see how the OS is actually made: